I'm a Ph.D student in the Institute of Computing Technology, Chinese Academy of Sciences (ICT, CAS). I received a B.S. degree from Nanjing University of Posts and Telecommunications in 2008 and Master degree from Inner Mongolian University in 2013 as a joint training student with ICT, both in Computer Science. I worked for Institute of Software, Chinese Academy of Sciences (ISCAS) as an assistant engineer from July, 2008 to September, 2009.
From November, 2015 to February, 2017, I did research at the Computer Science Department, University of Chicago as a visiting student, under the supervison of Professor Frederic T. Chong. The visiting is funded by a national awared scholarship from China Scholarship Council(CSC) and Professor Chong.
- 09/20/2017 I attend the 23rd National Conference of Information Storage (NCIS 2017) organized by CCF in Xi'an and present our work on "adaptive design for NVM based on dynamic tradeoffs". [NEW]
- 09/05/2017 Our paper "Quick-and-Dirty: Improving Performance of MLC PCM by Using Temporary Short Writes" has been accepted for ICCD 2017 as short paper. Congrats to all! [NEW]
- 10/28/2016 I extend my visiting to 02/09/2017. I would like to appreciate for the kindly help and support from Prof. Chong.
- 10/12/2016 Our paper "Balancing Performance and Lifetime of MLC PCM by Using a Region Retention Monitor" has been accepted for HPCA 2017! See you in Austin!
- Computer Architecture
- High throughput Processor Design
- Emerging Technology
- Non-Volatile Memory
- Full-system Simulator for ARMv8 ISA based processor. 2012.12-2013.9. Serving as project manager. Responsibility: software architecture design; accessory software development for coding support; document.
- Architecture Design for High Throughput Processor. 2012.7-2013.3. Serving as an designer for the on-chip interconnection sub-system(Network on Chip, NoC). Responsibility: NoC architecture design; NoC evaluation based on simulator.
- Cycle-accurate simulator for SPARC-V8 ISA based processor. 2010.11-2011.8. Serving as project manager and developer. Responsibility: SPARC-V8 instruction set implementation on simulator; simulator architecture design; document.
- Control Network System for China Railway High-Speed(CRH) Train. 2008.12-2009.9. Serving as an engineer in Reliability Sub-system. Responsibility: reliability standards research; software architecture design for long-term revolution and expert support system; document.
- Information Management System for Software Park of "Torch Project" around China. 2008.9-2008.12. Serving as project manager. Responsibility: software architecture design; document.
- Optimized design based on dynamic tradeoff for Non-Volatile Memory
- Energy Efficient Optical Network-on-Chip
- [ICCD'17] Mingzhe Zhang, Lunkai Zhang, Lei Jiang, Zhiyong Liu, and Fred Chong, "Quick-and-Dirty: Improving Performance of MLC PCM by Using Temporary Short Writes", to be appeared in ICCD2017.[NEW][PDF]. .
- [HPCA'17] Mingzhe Zhang, Lunkai Zhang, Lei Jiang, Zhiyong Liu, and Fred Chong, "Balancing Performance and Lifetime of MLC PCM by Using a Region Retention Monitor", 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA 2017), Austin, TX, USA, February 4-8, 2017.[PDF]
- [TPDS]Shaoli Liu, Tianshi Chen, Ling Li, Xi Li, Mingzhe Zhang, Chao Wang, Haibo Meng, Xuehai Zhou, Yunji Chen, "FreeRider: Non-Local Adaptive Network-on-Chip Routing with Packet-Carried Propagation of Congestion Information", IEEE Transaction on Parallel and Distributed Systems. Vol 26(8)， pp. 2272-2285, 2015.
- [PACT'14]Lunkai Zhang, Dmitri B. Strukov, Hebatallah Saadeldeen, Dongrui Fan, Mingzhe Zhang, Diana Franklin, "SpongeDirectory: flexible sparse directories utilizing multi-level memristors", International Conference on Parallel Architectures and Compilation (PACT), Edmonton, Canada, August 24-27, 2014.
- [ISLPED'13]Xiaochun Ye, Dongrui Fan, Ninghui Sun, Shibin Tang, Mingzhe Zhang, Hao Zhang, "SimICT: A fast and flexible framework for performance and power evaluation of large-scale architecture", International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, September 4-6, 2013.
- [NAS'13]Lunkai Zhang, Mingzhe Zhang, Lingjun Fan, Da Wang, Paolo Ienne, "Spontaneous Reload Cache: Mimicking a Larger Cache with Minimal Hardware Requirement", IEEE Eighth International Conference on Networking, Architecture and Storage(NAS), Xi'an, Shaanxi, China, July 17-19, 2013.
- [ISPA'13]Shuai Zhang, Zhiyong Liu, Dongrui Fan, Fenglong Song, Mingzhe Zhang, "Energy-Performance Modeling and Optimization of Parallel Computing in On-Chip Networks", TrustCom/ISPA/IUCC 2013, Melbourne, Australia, July 16-18, 2013.
- [ISPA'13] Mingzhe Zhang, Da Wang, Xiaochun Ye, Liqiang He, Dongrui Fan, Zhiyong Liu, "A Path-Adaptive Opto-electronic Hybrid NoC for Chip Multi-processor", TrustCom/ISPA/IUCC 2013, Melbourne, Australia, July 16-18, 2013.
- [IPDPSW'12] Mingzhe Zhang, Liqiang He, Dongrui Fan, "Self-Correction Trace Model: A Full-System Simulator for Optical Network-on-Chip", 26th IEEE International Parallel and Distributed Processing Symposium(IPDPS) Workshops & PhD Forum, Shanghai, China, May 21-25, 2012.